This invention is related generally to reduction of noise induced in power planes due to switching of digital circuits. More particularly, the present invention is related to circuits and method for suppression of transverse electromagnetic modes in parallel plate waveguides.
A common problem in electronic systems is switching noise induced in the power distribution system by switching of digital circuits of the system. Conventionally, such a system has one or more power planes designated, for example, +Vcc, and one or more ground planes. The potential difference between the power plane and the ground plane provides the DC operating voltage for the circuits of the system. If the system includes digital or other circuits with fast-switching outputs, noise can be induced in the power planes and even in the ground plane. The noise may have several sources, but generally is due to the high slew rate of the digital output and the non-zero inductance of the power plane. Especially for an output driving a large capacitive load, the L(di/dt) noise can be substantial. This noise on the power plane can affect other circuits, slowing system operation or producing data errors. The problem occurs in all types of systems, including integrated circuits and circuits formed on printed circuit boards (PCBs).
Existing EMI solutions to mitigate power plane noise induced by digital switching include the use of radio frequency (RF) bypass capacitors between +Vcc and ground layers, the use of very thin high dielectric constant, or low impedance, parallel-plate waveguides for power distribution, the use of split power planes which meet at only one common point, and other methods.
Board mounted bypass capacitors are the standard RF noise decoupling approach. The idea of this approach is to provide a very low reactance path between power and ground to decouple RF signals from the power terminal of a switching device such as a digital IC. To this end, banks of capacitors of widely different values (lower values have less parasitic inductance) are placed as close as possible to the power pins of integrated circuits.
Depending on the application, this approach is often adequate to reduce the power plane noise problem to an acceptable level. Capacitors are relatively inexpensive to add to a PCB design. However, such capacitors have practical high frequency limits of about 1 GHz or less due to the parasitic series inductance of vias used to connect the bypass capacitor between +Vcc and ground layers. Also, the parasitic inductance inherent in the capacitors reduces the high frequency limit of operation. Also, these capacitors consume valuable PCB real estate and add to the bill of materials cost.
The use of very thin (˜2 mil) dielectric cores, such as Nelco 4000-13 BC or ZBC 2000™ from Merix Corp., Forest Grove, Oreg., to separate power and ground planes will help to decouple RF signals so that the required number of decoupling capacitors may be reduced. This approach is called a buried capacitor layer. However, it will not suppress the parasitic resonance of parallel plate modes because it will not cut off TEM modes.
Subdividing the power and/or ground planes into multiple smaller planes connected only at one point will help to isolate digital noise and raise the frequency of parasitic resonances, but it will not eliminate the power plane noise problem. There are also practical limits as to how small or narrow power or ground planes can be made. As the conductors become narrower, the self inductance of the traces can create noticeable voltage drops due to L(di/dt) when fast switching occurs for high current loads. Also, narrow necks in the power or ground planes can cause heating due to resistive losses or complete breakdown at sufficiently high current levels.
The described problems are not limited to board-level designs. Semiconductor integrated circuits also suffer from switching noise induced in power and ground lines. Many of the problems described herein for PCB devices are exacerbated by the high degree of integration of a large integrated circuit.
One reference (Kamgaing, 2002) has tested a parallel plate waveguide which has a lower plate formed by an electromagnetic bandgap structure. While the disclosed device has some desirable features, the overall thickness of the disclosed parallel plate waveguide is more than 4.5 mm. For modern printed circuit board applications, this dimension is far too large for practical application. A much thinner parallel plate waveguide is required for integration as a power distribution system in a PCB.
Accordingly, there is a need for improved circuits, devices and methods for reducing induced power plane noise and improving RF isolation.